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Magazine Name : Ieee Design And Test Of Computers

Year : 2001 Volume number : 18 Issue: 04

Practical Formal Verification In Microprocessor Design (Article)
Subject: Appropriate Methodology , Data-Path-Dominated Hardware , Formal Methods
Author: Robert B Jones      John W O'Leary      Carl-Johan H Seger     
page:      16 - 25
Design And Development Paradigm For Industrial Formal Verfication Cad Tools (Article)
Subject: Cad Tool Designers , Circuit And Logic Designers , Custom Memory
Author: Narayanan Krishnamurthy      Magdy S Abadir      Andrew K Martin     
page:      26 - 35
Coverage Metrics For Functional Validation Of Hardware Designs (Article)
Subject: Software Simulation , Functional Validation For Hardware Designs , Measure The Completeness Of Validation
Author: Serdar Tasiran     
page:      36 - 45
Formal Verfication Of Commercial Integrated Circuits (Article)
Subject: Functional Verification , Formal Verification , Integrated Circuits
Author: Carl Pixley     
page:      4 - 5
Optimizing Multiple Eda Tools Within The Asic Design Flow (Article)
Subject: Design Methodology , Modern Programming Language Principles , Engineers Optimize A Design'S Functionality , Multiple Eda Tools
Author: Lionel Bening      Harry Foster     
page:      46 - 55
A Two-Input, One-Output Bit-Scalable Architecture For Fuzzy Processors (Article)
Subject: Several Proposed Hardware Architectures , Fuzzy Processors , Various Bit-Wide Resolutions
Author: Roberto D Amore      Osamu Saotome      Kari Heinz Kienitz     
page:      56 - 64
Applied Boolean Equivalence Verification And Rtl Static Sign-Off (Article)
Subject: Formal Boolean Equivalence , Verification To The Rtl Design , Effective Equivalance-Checking
Author: Harry Foster     
page:      6 - 15